אפריל 2021

Dewey Number  004 BAR

Baranov, Samary 

From algorithm to digital system : HLS and RTL tool Synthagate in digital system design

[place of publication not identified] : Samary Baranov, [2020]

Abstract

 This book is about how to use the Synthagate tool for the design of complex digital systems at the High Level and Register Transfer Level. Specifically, it demonstrates how to use Synthagate through the design of a processor to showcase the potential of Synthagte. The main difference between Synthagate and other design tools is that the designer is not required to use hardware description languages. Instead, Synthagate uses Algorithmic State Machines (ASMs) at the different steps of design. Synthagate covers most digital system designs from DSP to Processing Units. This tool can be used in the design of robots, controllers, processors, IoT & AI systems, video and voice processing systems, digital systems for automated and autonomous cars, et cetera. Most importantly, not only experienced hardware designers, but application engineers can design complex digital systems with Synthagate.

Subject

 Computer science

 System design -- Data processing

 Computer engineering

 Digital electronics

44298

Dewey Number  004 LEV

Cindy Lewis, Carl Chatfield, Timothy Johnson.

Microsoft Project 2019 : step by step  

 [New York, New York] : Pearson Education, Inc., [2019]

 Contents

 Project, project management, and you -- Take a guided tour -- Start a new plan -- Build a task list -- Set up resources -- Assign resources to tasks -- Format and share your plan -- Track progress : basic techniques -- Fine-tune task scheduling -- Fine-tune task details -- Fine-tune resource and assignment details -- Fine-tune the Project plan -- Organize plan details -- Track progress : detailed techniques -- View and report project status -- Format and print views : in-depth techniques -- Format reports : in-depth techniques -- Customize Project -- Share information with other programs -- Consolidate projects and resources -- Use Agile project management with Project -- Appendixes. A. A short course in project management ; B. Develop your project management skills ; C. Collaborate : Project, SharePoint, and PWA ; D. Use this book in a classroom

Abstract

 The quick way to learn Microsoft Project 2019! This is learning made easy. Get more done quickly with Microsoft Project 2019. Jump in wherever you need answers-brisk lessons and informative screenshots show you exactly what to do, step by step. Other Project users will want to grab this book as well. Quickly start new plans, build task lists, and assign resources View resource capacity and track progress Capture and fine-tune work and cost details Visualize schedules with Gantt charts and other views and reports Consolidate projects, and share resources across plans Manage modern Agile projects (James Mills, Jr., contributor) Customize Project to maximize your efficiency Leverage improvements to task linking, timelines, and accessibility Master PM best practices while you learn Project Look up just the tasks and lessons you need

Title Sub.

 Microsoft Project

Subject

 Project management -- Computer programs.

44243

Dewey Number  515/.357 FIX

Fixed-point algorithms for inverse problems in science and engineering

New York : Springer, [2011]

Abstract

 Fixed-Point Algorithms for Inverse Problems in Science and Engineering presents some of the most recent work from leading researchers in variational and numerical analysis. The contributions in this collection provide state-of-the-art theory and practice in first-order fixed-point algorithms, identify emerging problems driven by applications, and discuss new approaches for solving these problems. This book is a compendium of topics explored at the Banff International Research Station "Interdisciplinary Workshop on Fixed-Point Algorithms for Inverse Problems in Science and Engineering" in November of 2009. The workshop included a broad range of research including variational analysis, numerical linear algebra, biotechnology, materials science, computational solid-state physics, and chemistry. Key topics and features of this book include: · Theory of Fixed-point algorithms: variational analysis, convex analysis, convex and nonconvex optimization, subdifferential calculus, nonsmooth analysis, proximal point methods, projection methods, resolvent and related fixed-point theoretic methods, and monotone operator theory · Numerical analysis of fixed-point algorithms: choice of step lengths, of weights, of blocks for block-iterative and parallel methods, and of relaxation parameters; regularization of ill-posed problems; numerical comparison of various methods · Applications: Image and signal processing, antenna optimization, location problems The wide scope of applications presented in this volume easily serve as a basis for new and innovative research and collaboration.

Subject

 Inverse problems (Differential equations)

 Fixed point theory.

44256

Dewey Number  621.3815 MEH

Mehta, Ashok B.

System Verilog assertions and functional coverage : guide to language, methodology and applications / Third edition

Cham, Switzerland : Springer, [2020]

Contents

 Introduction -- System Verilog Assertions -- Immediate Assertions -- Concurrent Assertions - Basics (sequence, property, assert) -- Sampled Value Functions $rose, $fell -- Operators -- System Functions and Tasks -- Multiple clocks -- Local Variables -- Recursive property -- Detecting and using endpoint of a sequence -- ’expect’ -- ’assume’ and formal (static functional) verification -- Other important topics -- Asynchronous Assertions !!! -- IEEE-1800-2009 Features -- SystemVerilog Assertions LABs -- System Verilog Assertions - LAB Answers -- Functional Coverage -- Performance Implications of coverage methodology -- Coverage Options.

Abstract

 This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SystemVerilog Functional Coverage. Readers will benefit from the step-by-step approach to functional hardware verification using SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question ’have we functionally verified everything’. Written by a professional end-user of ASIC/SoC/CPU and FPGA design and Verification, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification, thereby drastically reducing their time to design and debug. This updated second edition addresses the latest functional set released in IEEE-1800 (2012) LRM, including numerous additional operators and features. Additionally, many of the Concurrent Assertions/Operators explanations are enhanced, with the addition of more examples and figures. · Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; · Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage language and methodologies; · Provides practical examples of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; · Explains each concept in a step-by-step fashion and applies it to a practical real life example; · Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book.

Subject  Electronic circuits

 Electronics

 Microelectronics

 Microprocessors

 Verilog (Computer hardware description language)

Dewey Number  621.3815 TAR

Taraate, Vaibbhav 

System Verilog for hardware description : RTL design and verification

Singapore : Springer, [2020]

 Contents

 Chapter 1: Introduction to FPGA design -- Chapter 2: Introduction to HDL -- Chapter 3:Introduction to SystemVerilog -- Chapter 4: Programming using SystemVerilog -- Chapter 5:Combinational design using SystemVerilog -- Chapter 6: Sequential design using SystemVerilog -- Chapter 7: RTL design using SystemVerilog -- Chapter 8: Verification using SystemVerilog -- Chapter 9: Design Implementation using FPGA.

Abstract

 This book introduces the reader to FPGA based design for RTL synthesis. It describes simple to complex RTL design scenarios using SystemVerilog. The book builds the story from basic fundamentals of FPGA based designs to advance RTL design and verification concepts using SystemVerilog. It provides practical information on the issues in the RTL design and verification and how to overcome these. It focuses on writing efficient RTL codes using SystemVerilog, covers design for the Xilinx FPGAs and also includes implementable code examples. The contents of this book cover improvement of design performance, assertion based verification, verification planning, and architecture and system testing using FPGAs. The book can be used for classroom teaching or as a supplement in lab work for undergraduate and graduate coursework as well as for professional development and training programs. It will also be of interest to researchers and professionals interested in the RTL design for FPGA and ASIC.

Subject

 Electronic circuits

 Microprogramming

 Electronics

 Microelectronics

 SystemVerilog (Computer hardware description language)

44304