Faculty & staff

Samary Baranov, Prof., Ph.D., and Doct. Sc. has more than thirty years of experience in the electronics industry. He is a former professor at the University of Precise Mechanics and Optics (ITMO) in St. Petersburg (Russia), the University of Beer-Sheva (Israel), Bar Ilan University (Israel), and Holon Institute of Technology (HIT) in Israel. At the same time, he worked as a consultant for several high-tech companies in Israel. Hundreds of his students, including more than 80 students with Master degrees (MD) and 20 with Ph.D. degrees, work successfully in Canada, Germany, Israel, Russia, and the USA for such IT companies as Amazon, AMD, Apple, Google, IBM, Intel, National Semiconductors, Motorola, Xilinx, and more.

In February 2001, he founded the North American Institute of Computer Systems (NAICS) in Toronto – the first training center in Canada to offer an advanced and intensive 250 post-graduate curriculum, "Electronic Hardware Design". More than 250 students (bachelors, masters, and PhDs) successfully finished this course from 2001 - 2004. Nowadays, he is the president and CEO of Synthezza Corp. – www.synthezza.com.

He has developed a design methodology for High Level Synthesis of digital systems and created the EDA tool Synthagate supporting this design methodology and implementing full automatic High Level (HLS) and Register Transfer Level (RTL) Synthesis of digital systems.

Synthagate is the first true 4th generation HLS tool, which shortens time-to-market for complex SoC designs by at least three times. It allows the designer to quickly implement, check, and estimate many possible design versions, to find an optimized decision of the design problems, and to simplify the verification problems for digital systems. Logic synthesis of Synthagate reduces the circuit area of FSMs and combinational circuits by as much as 20% to 30%, compared to the results of the best USA industrial tools from Synopsys, Xilinx, Altera, and Mentor Graphics.

Prof. Baranov is the author of fifteen books in English, French, and Russian, and more than 80 papers.

1. S. Baranov, From Algorithm to Digital System, ebook and paperbacks, Amazon.com, 2020, 80p. 
2. S. Baranov, Finite State Machines and Algorithmic State Machines, ebook and paperbacks, Amazon.com, 2018, 221p. 
3. S. Baranov, High Level Synthesis of Digital Systems, ebook and paperbacks, Amazon.com, 2018, 246p.
4. S. Baranov, Logic Synthesis for Control Automata, ebook and hardcover, Springer, 2012, 393p 
5. Design of Digital Systems and Devices. Springer Verlag, Berlin – Heidelberg, 2011. I was invited to write the first chapter “System Design”, 39p
6. S. Baranov, Logic and System Design of Digital Systems, TUT Press, 2008, 267p.
7. S. Baranov, Logic Synthesis for Control Automata, Kluwer Academic Publishers, Boston - London Dordrecht, 1994, 405p.
8. S. Baranov, V. Skliarov, Digital Units with Programmable LSI, Radio i Sviaz, Moscow, 1986, 272p. (in Russian).
9. S. Baranov, Synthese des Automates Microprogrammes, Mir, Moscou, 1983, 336p. (in French).
10. S. Baranov, L. Zhuravina, V. Skliarov, Computer Aided Design of Computers, Vishejshaja shkola, Minsk, 1981, 206p. (in Russian).
11. S. Baranov, V. Sinev, Automata and the Programmable Logic Arrays, Vishejshaja shkola, Minsk, 1980, 136p. (in Russian).
12. S. Baranov, Synthesis of Microprogram Automata (Graph-Schemes and Automata), 2nd ed, Energija, Leningrad, 1979, 232p. (in Russian). 
13. S. Baranov, S. Majorov, J. Sakharov, V. Selutin, Computer Aided Design of Digital Units, Sudostroenie, Leningrad, 1979, 264p. (in Russian).
14. S. Baranov, Synthesis of Microprogram Automata, Energija, Leningrad, 1974, 216p. (in Russian).
15. S. Baranov, S. Majorov, G. Novikov et al, Design of Computers, Visshaja Shkola, Moscow, 1972, 344p. (in Russian).

1. Baranov S., Levin I., Keren O., Karpovsky M. (2009) Designing Fault Tolerant FSM by Nano-PLA, 15th IEEE International On-Line Testing Symposium, Sesimbra-Lisbon, Portugal, 229-234
2. Invited paper for IFAC conference: Samary Baranov, ASMs in High Level Synthesis of EDA tool Abelite, IFAC Proceedings Volumes, Volume 42, Issue 21, 2009, Pages 160-165 Elsevier
3. Baranov S., Levin I., Keren O., Karpovsky M. (2009) Designing Fault Tolerant FSM by Nano-PLA, 15th IEEE International On-Line Testing Symposium, Sesimbra-Lisbon, Portugal, 229-234
4. Andrei Karatkevich, Samary Baranov, Graph based approach to test bench constructing for datapath, 2010/9  IWK  662-667  Tech. Univ. Ilmenau
5. S. Baranov, High level synthesis in EDA tool "Abelite",  Electronics and Telecommunications Quarterly, 2009, volume 55, issue 2, pp. 123-156
6. Samary Baranov, Sergey Frenkel, Viktor Zakharov, Semiformal verification for pipelined digital designs based on Algorithmic State Machines, Informatics and its Application, 2010, v. 4, pp. 48-59, Russian Academy of Science.